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ITsVISTA KB-Link: KB2014038

Message Signaled Interrupt cant be enabled on Via Nano CPU

Based on PCI 3.0 specification, the MSI enable bit is the bit 0 of “Message Control” register (MSI capability + offset 0×2). This “MSI Enable” bit is always being set to 0 on the failed systems.

For more information on this issue, including potential causes, workarounds, and resolutions, see: Microsoft KB Article KB2014038.

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